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The frequency limitation is only valid within the init phase, after the init is done, You can use SPI frequencies up to 20MHz and more. My suggestion is to use an image file, which contents a number of "0-padded" GT1 files of, for example, 64K or snapshots. During init, which should be done at start...
Some further ideas: Hardware: - 64K (128K) RAM is mandatory, probably it should be possible to make the upper 32K switchable if a 128K RAM is used - Fill at startup 0xF000 to F7FF with 0x01, 0xF800 to 0xFFFF with 0x00 - /IOSEL decoder with 74xx30 /IOSEL = /(A11 & A12 & A13 & A14 & A15 & (inv)OE) - 7...
Some thoughts... Another idea is to use only pages 0xFD-0xFF. So 63K of RAM can be used and it needs only a 74LS30 etc. to decode. I prefer SPI as communication protocol, so also SPI EEPROM/FLASH can be used as external storage. If one of the the pages is selected, a ld[y,x] can register 2 chip-sele...
- 07 Jan 2019, 20:40
- Forum: Hardware and software hacking
- Topic: Gigatron emulator in a µC
- Replies: 0
- Views: 50
Hello, a new Gigatron emulator is alive: http://www.jcwolfram.de/projekte/gtmicro_en/main.php It emulates a cycle accurate gigatron with 64K RAM in a overclocked STM32F405, the 'external' hardware is nearly identical to the original (except for the lower voltage levels). gigatron_tinybasic2.jpg