Search found 7 matches

by cmpxchg
14 Jul 2019, 10:15
Forum: Hardware and software hacking
Topic: In Circuit EPROM emulator and debugger
Replies: 11
Views: 1395

Re: In Circuit EPROM emulator and debugger

Nice, I think EPROM emulators are great for hardware experimentation and testing changes to the ROM, as well as testing and tuning timing to other hardware interfaces. Having both an SDcard and USB interface to change contents is great too. Do you plan to sell boards or even kits for your gigatron p...
by cmpxchg
13 Jul 2019, 18:24
Forum: Hardware and software hacking
Topic: New vCPU instructions? (poll)
Replies: 10
Views: 1038

Re: New vCPU instructions? (poll)

I would like a bit more guidance to make an informed decision on what (two) items to vote in the poll :) Knowing the expected instruction mix in existing vCPU programs and added value, speedups for example. 1. The concept of a vCPU interface was known to me when I put my unit together, but I was una...
by cmpxchg
15 Jun 2019, 11:15
Forum: Hardware and software hacking
Topic: v6502
Replies: 20
Views: 4551

Re: v6502

Very nice! Yet another 'encapsulated processing core' - similar to a russian doll. There is one thing which I dearly miss in both cores, and that is interrupt handling - NMI or normal IRQs - within 'reasonable' latency. It doesn't need to be cycle-exact, as long the user-level end-purpose - reliable...
by cmpxchg
12 Jun 2019, 15:21
Forum: Hardware and software hacking
Topic: dual ported SRAM for co-processing
Replies: 5
Views: 549

Re: dual ported SRAM for co-processing

Steve Wozniak made a custom (floppy) disk controller using a statemachine from discrete chips [1], later integrated in a single chip. This logic seems to have lasted all the way to the original iMacs running on PowerPC derived memory busses. An integrated floppydrive controller like NEC µPD765 and t...
by cmpxchg
08 Jun 2019, 12:32
Forum: Hardware and software hacking
Topic: dual ported SRAM for co-processing
Replies: 5
Views: 549

Re: dual ported SRAM for co-processing

> I wonder whether a standard single port RAM could be accessed by two processors, if those access cycles were > guaranteed not to occur simultaneously? This would mean locking the whole address bus, since the main RAM (but not the ROM) are on there as well - see page 37 of the manual. Halting the o...
by cmpxchg
08 Jun 2019, 08:27
Forum: Hardware and software hacking
Topic: dual ported SRAM for co-processing
Replies: 5
Views: 549

Re: dual ported SRAM for co-processing

Fitting more into the TTL nature of the gigatron - part availability around the 70's/80's, I did also find dual-ported registers/SRAM, SN74AS870 and SN74AS871 This is only 16 bytes, perhaps good enough for a simple queue or register-bank that can be polled by a coprocessor. Does anyone know when thi...
by cmpxchg
07 Jun 2019, 12:06
Forum: Hardware and software hacking
Topic: dual ported SRAM for co-processing
Replies: 5
Views: 549

dual ported SRAM for co-processing

I was wondering if the 32 kb extension as proposed by Marcel could alternatively be used with dual-ported SRAM instead This way two gigatrons side to side can have shared memory, share memory structures for high-speed I/O, using spinlocks to protect data structures, and have truely bidirectional I/O...