Gigatron Hackers

Program gtasm is not a part of glcc. I believe it belongs to gtbasic and translates a .vasm file into a .gt1 file. Glcc relies on a python program named glink which is both an assembler and a linker. Glink accepts vcpu assembler files with a python syntax not compatible with the .vasm files generate...

veekoo wrote: ↑21 May 2022, 12:07 Great contribution to Gigatron TTL society to make this GLCC available! Floating point mentioned. MIght my fractals with floating point calculation get any faster?

Not until we get at67's rom.
Maybe twice faster but not more.

Release 1.5 of GLCC. Just because this has been a long time and because a lot of internal things have changed. he page zero usage has been changed to increase compatibility with at67's' forthcoming work. The runtime support for longs and floats now works entirely in area 0xc0-0xcf using either the ...

- Could one of the yellow wires touch the legs of U34-35 (low addresses).
- Is D16 properly soldered (it looks weird on the picture - as many other diodes)
- The R18 damage is a bit frightening.

If all LEDs are on, then this means that the Gigatron made it to line 629 of the ROM https://github.com/kervinck/gigatron-rom/blob/432e843b4f6c84861b2181bbc5234925bcf63e8e/Core/dev.asm.py#L629 . This means that many things are working (rom, ram, instruction decoder, ...). Therefore you are probably ...

$ glcc --version GLCC_RELEASE_1.4-73-g1fb0fe4 This comes from command 'git describe --tags' GLCC_RELEASE_1.4 is the tag of latest official version 73 is the number of commits since the latest official version 1fb0fe4 designates the hash id of the commit (usage in git checkout for instance). A lot o...

How to compile TSTmem.c for v4, v5a and dev roms? (glcc -map=32k TSTmem.c ?) And Reset.gcl? (python3 core\compilegcl.py Reset.gcl ?) See the makefiles https://github.com/lb3361/gigatron-lcc/blob/master/stuff/tst/Makefile and https://github.com/lb3361/gigatron-lb/blob/main/extension-crazy/progs/rese...

Some Gigatrons with 64K keep displaying "Gigatron 128K" when they boot. The ctrl() instruction that controls the RAM & IO expansion board is a nonsensical instruction that asserts both the output enable (OE) and write enable (WE) pins of the static ram socket. The expansion board recog...

Thanks, in testings I have done with the overclocked gigatron board I saw that a DIP14 size oscillator is more stable and less noisy than a XTAL based Colpitts oscillator like the one used in the Gigatron board Chances are that the DIP14 oscillator contains about the same circuit, but with tighter ...

The Gigatron boots to the main menu unless it detects the presence of a sd card. Therefore, to bypass the sd card boot, the most intuitive solution is to either remove the sd card or use the push-push mechanism of the socket to disconnect it electrically (a kind of a button in fact.) Booting the Gig...