Gigatron Hackers

Some impressions!

Decided to attend the Vintage Computer Festival in Berlin this weekend! Looking forward: https://www.vcfb.de/2018/

Someone inquired about built-in routines you can call from the WozMon. I figure I should share my reply here: Like the Apple-1, the Gigatron’s RAM is in a virgin state after starting WozMon. However, typical tutorials refer to routines present in the monitor itself, and there some similar ones in ou...

Some notes: 1. There is an unused multiplexer in U12 that can be turned into a slow inverter (and not much else because the select lines are shared with the other multiplexer). You would put the input on pin 15, keep pin 10 to 13 tied to Vcc and then get an inverted output on pin 9. It's a bit slow ...

For reference, I found back more measurements from the time we were working on comparing various types of clock circuits, inverter types and values for the passives. clk51.png This is a critical-path breakdown I made at the time (calculated and measured). Shortly after this we settled for a 6.25 MHz...

Any thoughts? This is a clever find. Two thoughts: 1. The DB9's +5V line is intended as an output, and that using it as an input by-passes the multi-fuse. You might want to add one on what will now be an input. 2. The pulse lines are slightly different between the jacks because of the 68 ohm resist...

The issue with the RAM /OE can probably be solved by connecting the bus decoder's /E input to the clock. The bus will then be driven only while the clock is low (the second half of a cycle), which should be good enough, as the data there is only needed at the end of the cycle, when the rising edge ...

IMG_4264 2.jpg The Apple-1 next to the Gigatron is a beautifully done replica. It's fully functional, complete with cassette interface. The PCB is drawn in the same way and the chips even have 1970s date codes on them. It's on display in an operational state. I could play around and type commands i...

Congratulations, you're the first to report a successful recreation in FPGA!

For those who missed the pictures/ directory on GitHub:

I want one :-) Is this using HGM's proposal of an extended instruction set? The good thing about the Harvard architecture is that the translation is not a Turing-complete problem. The only thing that may give a bit of a headache is that there is st $dd,[$dd] in several places in the existing ROMs. F...