Gigatron Hackers

I've been toying with that idea too. The 8 PIOs offload much of the serial data manipulation from the main dual core M0+. It's crazy when you think about how much processing power you get for $4. Absolutely crazy. After reading your posts I bought a Tank Nano 9k. Crazy power too. Too bad their psRA...

I think you could emulate vcpu on a $5 raspberry pico. You would have to smartly use their dma and "state machines" to output the video and the sound, possibly with the help of the second arm core. This would make a very cheap and very fast Gigatron...

bmwtcu wrote: ↑28 May 2022, 01:56 ... but most importantly I can deal with full 64kx16 ROMs, and in fact can use DIP switches to change ROMs.

Are you using the same IDT 128kx16 memory for both native code and gigatron data? Or is there a second sram on your board?

Program gtasm is not a part of glcc. I believe it belongs to gtbasic and translates a .vasm file into a .gt1 file. Glcc relies on a python program named glink which is both an assembler and a linker. Glink accepts vcpu assembler files with a python syntax not compatible with the .vasm files generate...

veekoo wrote: ↑21 May 2022, 12:07 Great contribution to Gigatron TTL society to make this GLCC available! Floating point mentioned. MIght my fractals with floating point calculation get any faster?

Not until we get at67's rom.
Maybe twice faster but not more.

Release 1.5 of GLCC. Just because this has been a long time and because a lot of internal things have changed. he page zero usage has been changed to increase compatibility with at67's' forthcoming work. The runtime support for longs and floats now works entirely in area 0xc0-0xcf using either the ...

$ glcc --version GLCC_RELEASE_1.4-73-g1fb0fe4 This comes from command 'git describe --tags' GLCC_RELEASE_1.4 is the tag of latest official version 73 is the number of commits since the latest official version 1fb0fe4 designates the hash id of the commit (usage in git checkout for instance). A lot o...

How to compile TSTmem.c for v4, v5a and dev roms? (glcc -map=32k TSTmem.c ?) And Reset.gcl? (python3 core\compilegcl.py Reset.gcl ?) See the makefiles https://github.com/lb3361/gigatron-lcc/blob/master/stuff/tst/Makefile and https://github.com/lb3361/gigatron-lb/blob/main/extension-crazy/progs/rese...

Some Gigatrons with 64K keep displaying "Gigatron 128K" when they boot. The ctrl() instruction that controls the RAM & IO expansion board is a nonsensical instruction that asserts both the output enable (OE) and write enable (WE) pins of the static ram socket. The expansion board recog...

Thanks, in testings I have done with the overclocked gigatron board I saw that a DIP14 size oscillator is more stable and less noisy than a XTAL based Colpitts oscillator like the one used in the Gigatron board Chances are that the DIP14 oscillator contains about the same circuit, but with tighter ...