Gigatron Hackers

I'm not really completely understanding your train of thought here, so I'll spell out the way I understand Trampolines, LUP, ROM space etc. LUP is a vCPU instruction that is used by vCPU code to access look up tables in ROM, currently the only LUT's in ROM accessed by vCPU code are the Font tables a...

Thanks for the quick reply! Is there a way to prevent the user from changing modes? Which mode would you recommend in this case? You can keep calling the SYS call SYS_SetMode_v2_80 in your main loop, it will be annoying for the user and frowned upon for most Gigatron applications, but in your use c...

I hope GtForth can be useful to you, and any feedback is welcomed! Also, please let me know if you find any bugs or quirks in the program. Works great over here, with a slightly modified print routine you could use the blank scanlines as free RAM as well, (of course if the user manually modified th...

Update: I've added the following instructions to the PREFX3 page, the PREFX1 and PREFX2 pages are currently empty. ADDWI <imm>, vAC += 16bit imm, 26+28 cycles. SUBWI <imm>, vAC -= 16bit imm, 26+28 cycles. ANDWI <imm>, vAC &= 16bit imm, 26+22 cycles. XORWI <imm>, vAC ^= 16bit imm, 26+22 cycles. ...

Here is what the implementation of PREFX3, it's dispatch page and some corresponding instructions look like now, you'll note the following: Reset to the default vCPU page is now handled in dispatch. vPC fix up is handled in PREFX3. Parsing of the 2nd instruction operand, (PREFX3 instructions always ...

I see you've moved code some code to page 0. If I ever complete and merge my Forth, I need a short routine in page 0 (currently 5 instructions). Could you try to leave at least that much space for my purposes? The location isn't important. I used a 3 slot launchpad to move SYS_Reset_88's implementa...

I didn't just mean it for prefix instructions. I just observe that half of the page3 instructions waste three cycles adjusting vPC. For these instructions, vPC is adjusted twice: once in the instruction body (+/-1) and once in the dispatch code (+2). Three cycles, that's 10% of maxTick, an obvious ...

denjhang wrote: ↑04 May 2021, 16:21 How should I compile ROMvX0, is there any one that has been compiled?

I haven't released it yet unfortunately, I should have by now, but work has taken up 90% of my time...I'll do my best to get it dropped soon, but no promises.

Because nearly all old vcpu instructions were two bytes long, it made sense to lose 3 cycles adjusting vPC on the occasional one- or three-bytes long ones. But this is no longer the case with all your new instructions. So what about having three versions of REENTER for one-, two- and three- bytes i...

Thank you for your hint, I prefer 8-bit or even higher-quality audio to 6-bit audio. Regarding the hardware transformation of 8-bit audio, can you show me the schematic diagram? I am not very skilled in the circuit, but I would like to try it. I'm sorry, I don't have the time to design a circuit an...