Gigatron Hackers

Yeah the implementation of a 16bit vSP was trivial to be honest, I had the exact same tick values as you when I first did the change as well; but I used an extra level of indirection, (sacrificing a few ticks), to squeeze in many more instructions...I have 28 new instructions now. I'm still not 100%...

lb3361 wrote: ↑08 Mar 2021, 22:43 Is there a comprehensive reference documentation that explains all the GTBasic keywords ?

I'm working on it now, it's a rough slog.

Is there a special thread about sprites? I don't know if I should ask all the questions in this place. I'll just do it. To me, a sprite is a graphic that I can move around the screen without "breaking" the background. I'm not sure, but as far as I've read that's not the case with the spri...

A few simple graphics benchmarks tested across all current ROM versions in Mode 2.

Nice pics, discreet job like cde's, welcome to the club.

Just to be clear: Marcel designs always gives you bank 0 in the low memory 0x0000-0x7ffff. The video buffer leaves there. The bank bits B[1..0] select what you see in the high memory 0x8000-0xffff. If B[1..0]=0, then you have a copy of the low memory in high memory, like a 32KB Gigatron. If B[1..0]...

The 16 bits stack is a biggie. Will you make it available in the dev rom soon? I am currently testing an experimental ROM with the new instructions and 16bit stack, there is only one problem left and that is the VBlank cursor flash for the Apple-1 emulator causes a timing glitch and hence a loss of...

To me this looks like the most reasonable option because, as you explain, all bytes in the first 32KB are accounted for, and because a Gigatron that boots from a SD card must have one of these expansion boards so far. But even that is not enough. Although we can hide the code in bank 3, we cannot h...

Update: maxTicks was reduced from 32 cycles back to 30, the increase in average app execution time was not worth the extra functionality provided by the three 32 cycle instructions. Removed COND Removed CMPI Reverted XCHG from XCHG [var0] [var1] to XCHG [var1] where [vAC] = var0 Reverted ADDW cycle...

Well, I thought about the software and I realized that the main problem is the occupancy of page zero locations. Both the native and virtual instruction sets are super dependent on page zero variables. Thanks to CALLI, we could write service routines and hide them in page 3. But they will still nee...