80 Column Mode and high speed serial?

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Posts: 81
Joined: 17 May 2018, 07:17

80 Column Mode and high speed serial?

Post by monsonite »

Clearly the original vision for the Gigatron was a 80's retro-style machine with colour video and audio - capable of playing arcade style games.

The TTL cpu and integrated video generation hardware was designed around the requirement of 1/4 VGA video generation at 2 bits per colour.

What if we took a somewhat sideways step, and specified that the video output was to be monochrome, text based, and meet the needs of an 80 column display? Effectively making it a "business" machine (or terminal to another system), rather than a games machine.

This approach would mean we no longer had to push 6 bits of pixel data to the screen, every 6.25MHz clock cycle, but we could load each row of character data into an 8-bit parallel load shift register (74HCT165) and clock that data out serially to drive the pixel output. The shift register clock would run at 25MHz allowing the cpu to only fetch from the character ROM at 3.125MHz - allowing some additional processing to be done between character fetches. A resistor network could be used to give either a white, green or amber text colour - depending on your preference.

Thinking about a high speed video shift register, also got me pondering about other high speed serial I/O processes - which we now take for granted, since SPI became a ubiquitous interface between devices. An SPI interface is essentially just two shift registers, as one clocks its data out, the other clocks data in from the connected device.

A recent Hackaday featured a design for a UART built from TTL - but it was 12 devices.

https://shepherdingelectrons.blogspot.c ... puter.html

With a bit of TTL ingenuity, an SPI interface could be created in far fewer devices - and theorhetically allow data transfer at up to around 50Mbit/s. This would allow for practical use of fast SPI memory devices - to be used as external solid-state drives, or to another SPI machine - equivalent to a server or in Gigatron parlance (circa 1980) the mainframe.

Removing the constraints of having to service the VGA generation, and overclocking the Gigatron to 12.5MHz could result in a very capable machine, yet retain the fundamental simplicity and philosophy of Marcel's original design.
Posts: 18
Joined: 30 Sep 2020, 22:19

Re: 80 Column Mode and high speed serial?

Post by Sugarplum »

That sounds like a good idea for this type of implementation. It would be nice to have a way to switch modes and to remap the color signals to where you can keep the D/A converter as it is, but output it as green/amber/white. Yeah, that could be a nice setup for a DOS-like (or CPM-like) OS and be good for business apps.

Related, I'm still trying to figure out how to do a Gigatron-inspired design on my FPGA board (I may start a thread for it). I'd want my video module to create the syncs, preferably with a framebuffer. I'd probably have a text ROM on the video side, and give the circuitry the ability to change modes. So have a mode to where you can just send it ASCII, and the video circuitry does the characters. This would likely be easier on FPGA since they use simple dual-ported BRAM, thus making it easier to read and write without using odd clocking tricks or cycle-stealing. If I were going that far, I'd have the video side do the line-quadrupling. So that means that the line selection can be removed from the system ROM and only 1/4 video is sent.
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Joined: 07 Nov 2020, 22:39

Re: 80 Column Mode and high speed serial?

Post by fogbucket »

I just discovered the gigatron today and was pondering this exact thing: how to add a high-res bitmapped output for a wider text mode. I was drawn to the same approach: add a shift register clocked at 25Mhz.

I figured a nice backwards-compatible compromise would be to have the bitmap select between outputting a foreground or background 6-bit color.

Are the 2 high bits in each display buffer byte used for anything currently? (Sorry, I'm new to the hardware)
If they aren't used then my thinking would be to use those bits as follow

00 xxxxxx - write xxxxxx to the BG color register i.e the existing output reg - so backwards compatible with existing code
01 xxxxxx - write xxxxxx to the FG color - this color would be output instead when the bitmap is set to 1
1 xxxxxxx - write 7 bits to the bitmap shift register. The 8th bit would be fixed.

I'd hope this would only take a couple of extra chips - plus a few discretes to decode those high bits?
Posts: 314
Joined: 14 May 2018, 08:29

Re: 80 Column Mode and high speed serial?

Post by at67 »

fogbucket wrote: 07 Nov 2020, 23:41 Are the 2 high bits in each display buffer byte used for anything currently?
They are unused by the native code firmware and the Gigatron hardware, but at least one application that I know of uses them for per pixel logic processing, (Gigatris). Therefore relying on those two bits would result in a system that would not be 100% application software compatible.
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