Gigatron on an FPGA

[menloparkinnovation]

Hi, I have created an implementation of the Gigatron on an FPGA.

The project site is at https://github.com/menloparkinnovation/menlo_gigatron

Thanks, and happy hacking.

[marcelk]

Congratulations, you're the first to report a successful recreation in FPGA!

For those who missed the pictures/ directory on GitHub:

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[bmwtcu]

Hi, I have created an implementation of the Gigatron on an FPGA.

The project site is at https://github.com/menloparkinnovation/menlo_gigatron

Thanks, and happy hacking.

Thanks for posting your design. It was very helpful in putting together my own Gigatron FPGA. I've been working on this for the past 6 or 7 weekends. It's still a work in progress, but I'm declaring partial victory now that it boots!!!

#Blinkenlights

Gigatron.jpeg (216.69 KiB) Viewed 3042 times

GOALS:-
1. Re-learn Verilog. My last FPGA design was in 2006. I really need to work on testbench creation, but wouldn't you know it, the Gigatron is so simple that my simulation candidate booted before I could get a stimulus file put together!
2. Upcycle as much as possible. FPGA development board is actually a satellite modem from the RF bone pile that was being tossed. The FPGA is a Xilinx Kintex-7 with ~160k Logic Cells, so plenty of Distributed/Block RAM and room to grow. It also is supported by the free Vivado WEBPACK, so I didn't have to spend any money on development tools. Fortunately the math for 3.3V R2R DAC worked out and were resistor values I already had in my toolbox. Cables and LEDs were all salvaged together with the board.
3. "Upgrade" to 64k SRAM.
4. Direct drive a TFT display? Have to research whether this is possible.
5. Along the way, ROMv3 showed up and I just had to add that too.

What works:-
1. Blinkenlights
2. VGA display

What needs work:-
1. Right now, I'm trying to assemble a controller with a 74LS165 PISO shift register chip and some pushbuttons I salvaged before I can test input.
2. I don't have an R2R SIP in my toolbox, and I don't quite have enough room on my salvaged perfboard to build one from scratch. I do have a boatload of resistors and caps, as well as a PAM8403 Class D amp and salvaged speaker that I was going to use. I just need to find a perfboard to build it up on. I might just cave and break open a new perfboard so I can work on the audio DAC over Thanksgiving.
3. Even with using distributed RAM instead of block RAM, I'm comfortably under 25% utilization. With all that room left over, I might also have to look into implementing keyboard interface/Pluggy McPlugface too. https://git.morgothdisk.com/VERILOG/VER ... core_opt.v
4. Figure out how to port Floppy Bird https://github.com/icebreaker/floppybird to the Gigatron. My last assembly program was in 1996.

[TacleHacker]

GOALS:-
2. Upcycle as much as possible. FPGA development board is actually a satellite modem from the RF bone pile that was being tossed. The FPGA is a Xilinx Kintex-7 with ~160k Logic Cells, so plenty of Distributed/Block RAM and room to grow. It also is supported by the free Vivado WEBPACK, so I didn't have to spend any money on development tools. Fortunately the math for 3.3V R2R DAC worked out and were resistor values I already had in my toolbox. Cables and LEDs were all salvaged together with the board.

Hi bmwtcu,

I also always try upcycling electronic parts doomed to the e-waste bin. Can you please tell more about this sat modem that you re-used ? Is it the kind that satellite internet providers (used to) give out to their customers for the sat uplink ?

Thank you and great work, BTW !

[bmwtcu]

Hi, this was an evaluation board that was designed by my team to prove out a new (back then) design many years ago and is not available commercially. I was happy to rescue it from the dumpster and find it new life as a Gigatron. Everyone on the team I showed it to thought it was very cool playing Tetris with audio and video on something that was never designed to do either.

Just as an update, I did get both the DIY NES controller and audio DAC working. There is however some kind of bug when trying to display Jupiter in "Pictures" that I never got around to debugging. The Mandelbrot fractal and parrot both display just fine, as do the Snake/Racer/Tetronis/Bricks games, but while drawing Jupiter, the drawing stops halfway. I can tell the Gigatron is still working since I can reset using the controller. I suspect that since the image is packed between 0x4900 and 0x8500 in ROMv3, it could be some kind of address line timing issue due to less than optimal P&R. I did only set the clock constraint at 6.25MHz. Perhaps I'll tighten the constraint whenever ROMv4 shows up and I have time to tinker again.

[bmwtcu]

As an update to this thread. Interfacing directly from the FPGA to a native 640x480 display is very much possible, but any deviation from the native resolution of 640x480 will require non-trivial effort on the software side because the VGA timing is derived from the number of instructions executed and isn't as simple as changing a variable.