Gigatron on an FPGA

Using, learning, programming and modding the Gigatron and anything related.
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menloparkinnovation
Posts: 1
Joined: 10 Sep 2018, 15:47

Gigatron on an FPGA

Post by menloparkinnovation »

Hi, I have created an implementation of the Gigatron on an FPGA.

The project site is at https://github.com/menloparkinnovation/menlo_gigatron

Thanks, and happy hacking.
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marcelk
Posts: 488
Joined: 13 May 2018, 08:26

Re: Gigatron on an FPGA

Post by marcelk »

Congratulations, you're the first to report a successful recreation in FPGA!

For those who missed the pictures/ directory on GitHub:

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bmwtcu
Posts: 54
Joined: 01 Nov 2018, 12:02

Re: Gigatron on an FPGA

Post by bmwtcu »

menloparkinnovation wrote: 11 Sep 2018, 03:13 Hi, I have created an implementation of the Gigatron on an FPGA.

The project site is at https://github.com/menloparkinnovation/menlo_gigatron

Thanks, and happy hacking.
Thanks for posting your design. It was very helpful in putting together my own Gigatron FPGA. I've been working on this for the past 6 or 7 weekends. It's still a work in progress, but I'm declaring partial victory now that it boots!!!

#Blinkenlights
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GOALS:-
1. Re-learn Verilog. My last FPGA design was in 2006. I really need to work on testbench creation, but wouldn't you know it, the Gigatron is so simple that my simulation candidate booted before I could get a stimulus file put together!
2. Upcycle as much as possible. FPGA development board is actually a satellite modem from the RF bone pile that was being tossed. The FPGA is a Xilinx Kintex-7 with ~160k Logic Cells, so plenty of Distributed/Block RAM and room to grow. It also is supported by the free Vivado WEBPACK, so I didn't have to spend any money on development tools. Fortunately the math for 3.3V R2R DAC worked out and were resistor values I already had in my toolbox. Cables and LEDs were all salvaged together with the board.
3. "Upgrade" to 64k SRAM.
4. Direct drive a TFT display? Have to research whether this is possible.
5. Along the way, ROMv3 showed up and I just had to add that too.

What works:-
1. Blinkenlights
2. VGA display

What needs work:-
1. Right now, I'm trying to assemble a controller with a 74LS165 PISO shift register chip and some pushbuttons I salvaged before I can test input.
2. I don't have an R2R SIP in my toolbox, and I don't quite have enough room on my salvaged perfboard to build one from scratch. I do have a boatload of resistors and caps, as well as a PAM8403 Class D amp and salvaged speaker that I was going to use. I just need to find a perfboard to build it up on. I might just cave and break open a new perfboard so I can work on the audio DAC over Thanksgiving.
3. Even with using distributed RAM instead of block RAM, I'm comfortably under 25% utilization. With all that room left over, I might also have to look into implementing keyboard interface/Pluggy McPlugface too. https://git.morgothdisk.com/VERILOG/VER ... core_opt.v
4. Figure out how to port Floppy Bird https://github.com/icebreaker/floppybird to the Gigatron. My last assembly program was in 1996.
TacleHacker
Posts: 1
Joined: 27 Mar 2019, 06:30

Re: Gigatron on an FPGA

Post by TacleHacker »

GOALS:-
2. Upcycle as much as possible. FPGA development board is actually a satellite modem from the RF bone pile that was being tossed. The FPGA is a Xilinx Kintex-7 with ~160k Logic Cells, so plenty of Distributed/Block RAM and room to grow. It also is supported by the free Vivado WEBPACK, so I didn't have to spend any money on development tools. Fortunately the math for 3.3V R2R DAC worked out and were resistor values I already had in my toolbox. Cables and LEDs were all salvaged together with the board.
Hi bmwtcu,

I also always try upcycling electronic parts doomed to the e-waste bin. Can you please tell more about this sat modem that you re-used ? Is it the kind that satellite internet providers (used to) give out to their customers for the sat uplink ?

Thank you and great work, BTW !
bmwtcu
Posts: 54
Joined: 01 Nov 2018, 12:02

Re: Gigatron on an FPGA

Post by bmwtcu »

Hi, this was an evaluation board that was designed by my team to prove out a new (back then) design many years ago and is not available commercially. I was happy to rescue it from the dumpster and find it new life as a Gigatron. Everyone on the team I showed it to thought it was very cool playing Tetris with audio and video on something that was never designed to do either.

Just as an update, I did get both the DIY NES controller and audio DAC working. There is however some kind of bug when trying to display Jupiter in "Pictures" that I never got around to debugging. The Mandelbrot fractal and parrot both display just fine, as do the Snake/Racer/Tetronis/Bricks games, but while drawing Jupiter, the drawing stops halfway. I can tell the Gigatron is still working since I can reset using the controller. I suspect that since the image is packed between 0x4900 and 0x8500 in ROMv3, it could be some kind of address line timing issue due to less than optimal P&R. I did only set the clock constraint at 6.25MHz. Perhaps I'll tighten the constraint whenever ROMv4 shows up and I have time to tinker again.
bmwtcu
Posts: 54
Joined: 01 Nov 2018, 12:02

Re: Gigatron on an FPGA

Post by bmwtcu »

As an update to this thread. Interfacing directly from the FPGA to a native 640x480 display is very much possible, but any deviation from the native resolution of 640x480 will require non-trivial effort on the software side because the VGA timing is derived from the number of instructions executed and isn't as simple as changing a variable.
sajattack
Posts: 5
Joined: 23 May 2021, 14:07

Re: Gigatron on an FPGA

Post by sajattack »

Hello menlo, I'm trying to bring your Gigatron core to the MiSTer FPGA project https://github.com/MiSTer-devel/Main_MiSTer/wiki. Here is my fork of the core https://github.com/sajattack/Gigatron_MiSTer I have a strange video bug that only occurs in the "Pictures" Maybe you have seen something like this before and have an idea what could cause it?
Image
Last edited by sajattack on 01 Jun 2021, 23:39, edited 1 time in total.
bmwtcu
Posts: 54
Joined: 01 Nov 2018, 12:02

Re: Gigatron on an FPGA

Post by bmwtcu »

I don't think he/she has ever logged back in since that single post for this thread. Are you talking about the image not scrolling fully to the left and getting stuck? It sounds like the Jupiter issue that I encountered with ROMv3 back in 2019. Like you it only affected "Pictures" and all other graphics worked as expected. I've never had it show back up again in subsequent ROM versions and back then had attributed it to marginal address timing, perhaps related to the horizontal scrolling. I've since moved on to a stripped down SDROM image so never really spent any time investigating it.
sajattack
Posts: 5
Joined: 23 May 2021, 14:07

Re: Gigatron on an FPGA

Post by sajattack »

I'm talking about every 4th pixel being drawn too high. Also my problem is on ROMv4 and ROMv2.
at67
Posts: 332
Joined: 14 May 2018, 08:29

Re: Gigatron on an FPGA

Post by at67 »

Can you post a video?
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