Gigatron ASIC?!?

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Re: Gigatron ASIC?!?

Post by walter » 20 Jul 2020, 15:21

bmwtcu wrote:
20 Jul 2020, 14:32
Hi Walter, for me personally, it's a learning exercise.
Ok that's cool :) It will be an interesting ride for sure!

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Re: Gigatron ASIC?!?

Post by delpozzo » 20 Jul 2020, 15:49

Longer term, I'd have to look into whether I can find a suitable LCD display to make this a handheld!
A Gametron (or Gigaboy?) would be amazing :D

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Re: Gigatron ASIC?!?

Post by bmwtcu » 20 Jul 2020, 16:43

largenumabbrev.gif (17.63 KiB) Viewed 852 times
Hmm, let's see, what's smaller than Giga- (that isn't going to get me sued)? Kilotron?!? :lol:
Megatron.jpg (18.86 KiB) Viewed 852 times
If I can figure out how to, I'll start a poll, but keep the suggestions coming!

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Re: Gigatron ASIC?!?

Post by Flamore » 03 Nov 2020, 11:47

Producing ASIC's isn't that cheap (regular ones start at about 500 thousand). It also can only be ordered as die in amounts of 1000's, which of you would have to put an epoxy blob and pins? on. You could use some cheap FPGA chip that would be powerful enoough, Neverthless Gigatron-On-A-Chip (GoC suggestion anyone?) like the Nintendo-On-A-Chip (NoC) would be a success. I'm hope it works out well :D

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Re: Gigatron ASIC?!?

Post by Sugarplum » 03 Nov 2020, 22:12

Actually, ASIC costs are coming down. They now can do smaller orders by putting different products on the same wafer.

I, myself have considered coming up with an advanced Gigatron (on FPGA) with hardware video and a framebuffer, maybe a hardware PSG, maybe a programmable light sequencer that can be autonomous (so if you want to bit-bang it you can, but it can fake it when you need more power) if anyone would be interested, and perhaps a vCPU coprocessor. It would be neat if I did that if that could be turned into a SOC ASIC.

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Re: Gigatron ASIC?!?

Post by bmwtcu » 04 Nov 2020, 00:03

The NRE goes up exponentially with smaller nodes, but the older nodes are still reasonably cost effective. Regretfully, I never did get very far with this. While I do have a working prototype on FPGA, and got the OpenLANE toolchain installed, things suddenly got a lot busier at work starting August. Apparently companies are realizing in the midst of pandemic WFH that your address doesn't matter as much as the hours you keep and I've had 3 coworkers quit to "move" to CA, leaving me a little overwhelmed. I am still hopeful to get some time over Thanksgiving to devote to this. I just need to figure out how to instantiate the OpenRAM generated dual-port SRAM and the hooks to the RISC-V "test-harness", but I'm not hopeful on making the first shuttle.

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