Let's take some steps back first before jumping to the trampolines. Originally in the breadboard computer the [Y,X++] mode was supposed to serve two purposes:
Purpose 1. Streaming pixels to OUT
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ld [Y,X++],OUT
ld [Y,X++],OUT
ld [Y,X++],OUT
...
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ld $c0
ora [Y,X++],OUT
ora [Y,X++],OUT
ora [Y,X++],OUT
...
[
BTW, it helps to think of the st, ld, etc operations as being data-bus centric instead of AC-centric. Many other processors have AC-centric mnemonics, but it doesn't help to think that way here because the Gigatron really isn't like those architectures.
- ld pulls data from the data bus through the ALU without further operation such as +, -, ...
- ora pulls data from the data bus and logical-ORs it with AC (hence the 'a' in the mnemonic!)
- st writes data from the data bus into RAM.
Purpose 2. Transfer data from ROM to RAM
Since we have a Harvard architecture, we risked that storing embedded data became horribly inefficient. In a naive design you need two instructions to transfer a single byte:
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st $ff,[register]
inc register
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st $de,[Y,X++]
st $ad,[Y,X++]
st $be,[Y,X++]
st $ef,[Y,X++]
...
The LUP instruction
We discovered the trampolines in a much later phase, when writing ROM v1 for the kit edition and implementing vCPU. LUP (`lookup') is a vCPU instruction for arbitrary byte reading from ROM. You put a ROM address in vAC (we're in 16-bits world now), and LUP will load the value of ROM[vAC] in the lower byte of vAC (and clears the higher byte).
It was a complete surprise to us that anything like this was possible at all in our Harvard design. But it works by using a property of the pipelining and the branch delay slot: the single-instruction subroutine for making compact data tables in ROM. The basics of this are explained in Docs/Pipelining.txt and also in the HaD log. I won't repeat it here. Frans Faase also wrote about it in his online diary.
LUP isn't 100.0% random access: it can only read data byte offset 0...250 for ROM pages that have a piece of trampoline code at offset 251. LUP jumps to this offset with the desired page offset 0..250 in AC. The trampoline sequence itself is a bit tricky, as it relies on pipelining effects for jumping to the right byte in the page, hopping back into the trampoline and then jumping back into vCPU.
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0afb fe00 bra ac ;+-----------------------------------+
0afc fcfd bra $0afd ;| |
0afd 1404 ld $04,y ;| Trampoline for page $0a00 lookups |
0afe e065 jmp y,$65 ;| |
0aff c218 st [$18] ;+-----------------------------------+