emulix wrote: ↑07 Jun 2018, 14:16
Other vintage computers use writing to address 0x0, 0x1, 0x2, 0x3 to switch the bank
...
For 32 and 64 kb, it's very simple: one or two D flip-flops that are set to 1 or 0 by writing to the address 0 or 1 (2 and 3 more for the 64 KB). As a writing is basically groundless in this area (ROM), Thomson has quickly rocked a little door and and one or two rocker probably type 7474, to do the trick.
xopr wrote: ↑07 Jun 2018, 13:44
I think you can put the EPROM in stand-by by having pin 2 (/CE, chip enable) high.
in short: wire everything in parallel to the new sockets except pin 2:
lead pin 2 to the common of a toggle switch, lead the remaining pins to both sockets -> pin 2 and have those pins pulled up by adding 10k resistors to pin 40.
You could use the A15 line to 'toggle the bank' but that will give problems when iterating/counting the upper area of the RAM
emulix wrote: ↑07 Jun 2018, 12:41
Hello,
could it be possible to add a cartridge on the ROM socket? This cartridge would contains two ou three
software switchable ROMs. then the size of the BASIC would not be a problem.
Here's a video of my current switchable ROM setup, writing software on the emulator and not being able to see real results on the hardware was getting old fast:
https://youtu.be/gdF33IdJ85U
- The first 4-5 seconds are a close up of the daughter board, it contains the original Gigatron ROM plus two SST39SF010A 128Kx8 NOR Flash devices that I have configured as two banks of 64Kx16 EEROM; this allows me to instantly switch between three ROMS.
- Low 128Kx8 is 2 banks of native opcode ROM, (instructions).
- High 128Kx8 is 2 banks of native operand ROM, (data).
- The three LEDS signify which ROM is active.
- ROM0 = original, ROM1 = original with VideoB scanline modification, (you can see how fast Racer is running, almost twice as fast), ROM2 is VideoB scanline modded with my Tetris demo replacing the credits.
- The two push buttons are for RESET and ROM SELECT.
- I replaced the MCP-475 with a MCP-450 and wired it's VCC pin to the debounced RESET button.
- The glue chips are a 74HC14 hex schmitt inverter and a 4017 decade counter.
- The schmitt provides debouncing for the two buttons and some inverting for control signals.
- The 4017 is setup as a MOD 3 counter to switch between the ROMS, (I didn't want to use a rotary switch or SP3T monstrosity, I wanted something a little more elegant).
- Selection of the ROMs is performed by the 4017 controlling the ROMs with chip enables.
- Selection of the 64K banks within the SST39SF010A's is also controlled by the 4017, using A16, (the truth table is quite simple).
- I've written a simple utility that is part of Contrib/at67 that splits the ROM files into separate opcode and operand streams/files, I then combine them within the TL866A software to program each 128Kx8 SST39SF010A.
- ZIF sockets and a proper PCB will be next.
I'll post a circuit diagram when I get a chance.