The ctrl() instruction that controls the RAM & IO expansion board is a nonsensical instruction that asserts both the output enable (OE) and write enable (WE) pins of the static ram socket. The expansion board recognizes this condition and updates its status register instead of passing them to the SRAM chip. Without an expansion board, the SRAM chip sees both OE and WE asserted. With the normal 32K SRAM, this causes some random value to be written at the address present on the address bus.
The memory detection code in https://github.com/kervinck/gigatron-ro ... /Reset.gcl first tests whether doing a ctrl(0x7c) writes random data at address 0x7c. If this is the case, there is no expansion board: address 0x1f8 is set to zero to indicate that using the ctrl instruction is unsafe. Otherwise the code assumes there is a memory expansion board and that it is safe to use the ctrl() instruction. It then uses the ctrl(0xbc) instruction to set bank2. If writing to $8024 overwrites $24, then bank2 is the same as bank0, meaning that there is only 64k. Otherwise there is 128k.
The problem is that not all SRAM chips react like the original 32K SRAM when both OE and WE are asserted. Many chips do not write random data but instead do nothing or maybe rewrite what they just read at the indicated address. If such a RAM is used for the 64K hack (viewtopic.php?f=4&t=9), the Reset.gcl code believes that there is an expansion board because ctrl(0x7c) does not write random data. Yet, nothing happens when the code sets bank2. And since writing $8024 does not overwrite $24, the code concludes that the non-existent expansion board contains a 128K chip.
Attached are a few programs that attempt to fix this code.
- TSTmem.gt1 is a memory test program whose first part is an updated memory detection code that hopefully is able to correctly detect the presence of an expansion board and the correct (accessible) memory size from 32K to 512K.
- Reset.gt1 is a new version of the reset code which could possibly go into the DEVROM. Running this should be equivalent to a soft reset but with a fixed memory detection code (and a slightly different chord -- feedback welcome). This only works on ROMv5a because it uses SYS_ReadRomDir_v5 to find the MainMenu or the CardBoot programs instead of relying on hardcoded addresses computed during the ROM compilation.