Is this picture about instruction and operation right?

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jelly
Posts: 4
Joined: 26 Mar 2024, 08:13

Is this picture about instruction and operation right?

Post by jelly »

Hello.

I'm studying gigatron nowadays.
Engilsh is not my mother tongue, so my words can be weird. I ask for you understanding. :)
1.jpg
1.jpg (95.81 KiB) Viewed 112 times
In this picture, EPROM outputs a 16-bit digit.
High address(left) one byte is instruction, and the low address(right) one byte is operand.

I brought a machine code line here: 0006 6900 xora [y,$00] ;Invert value from memory
According this picture, 0x6900 == 0b0110 1001 0000 0000 → instruction: 0110 1001 / operand: 0000 0000

And, according this;
2.jpg
2.jpg (152.14 KiB) Viewed 112 times
We can divide instruction into three pieces; 01/10 1/001
and we can get this: RAM value to bus / RAM add: [0D], ALU dst: Y / Instruction: AND

But the code says the instruction of that line is xor.
So the information I get above is wrong.

So I tried again in the opposite direction; 011/0 10/01
The instruction 'XOR' is 011, so the first piece is for instruction.
Automatically, I got this: Instruction: XOR / RAM add: [0D], ALU dst: AC / RAM value to bus.
I think this is correct answer.

And the circuit diagram,
3.jpg
3.jpg (70.88 KiB) Viewed 112 times
the 'Bus access' piece is IR0 & IR1.
So automatically I can write like this:
4.jpg
4.jpg (156.93 KiB) Viewed 112 times
IR5 IR6 IR7
0 1 1
is xor.

But, in my example code, (IR7)01101001(IR0), IR7 IR6 IR5: 011.
This is an opposite direction.

From where am I wrong?

In my opinion,
5.jpg
5.jpg (190.6 KiB) Viewed 112 times

this is right.
I understood several machine codes according the picture I made, and I got any errors.

For another example machine code; 000d ca00 st [y,$00]
0xca00 == 0b1100 1010 0000 0000
Instruction: 1100 1010

1-1) According to the hackerhotel pdf (2.jpg)
11 / 001 / 010
Input to bus / RAM add: [0X], ALU dst: AC / Instruction: OR

2) Accordin to my pic (5.jpg)
110 / 010 / 10
Instruction: store / RAM add: [YD], ALU dst: AC / AC value to bus

The instruction that line says: store



I think this example is wrong too.
6.jpg
6.jpg (154.93 KiB) Viewed 112 times
According to my opinion,
01010100 → 010 / 101 / 00
Instruction: OR / RAM add: [0D], ALU dst: Y / Operand to bus

If I was wrong, please let me know.
Waiting for your help.
Thanks.
walter
Site Admin
Posts: 161
Joined: 13 May 2018, 08:00

Re: Is this picture about instruction and operation right?

Post by walter »

Interesting.. you found an error in my slides, after >5 years :-)

The slides are indeed incorrect. The correct information is on GitHub: https://github.com/kervinck/gigatron-ro ... ctions.pdf. In my slide, the instruction matches this order:
IR1 IR0 IR4 IR3 IR2 IR7 IR6 IR5
So the order of of the bits in the Bus, Mode and Operation partsare correct, but my slide has Bus first, then Mode, then Operation where it should be Operation, Mode, Bus (if you have the most significant bit on the left).

(It's not IR0 IR1 IR2 IR3 IR4 IR5 IR6 IR7 as you show in your image.)
jelly
Posts: 4
Joined: 26 Mar 2024, 08:13

Re: Is this picture about instruction and operation right?

Post by jelly »

walter wrote: 03 Apr 2024, 11:11 Interesting.. you found an error in my slides, after >5 years :-)

The slides are indeed incorrect. The correct information is on GitHub: https://github.com/kervinck/gigatron-ro ... ctions.pdf. In my slide, the instruction matches this order:
IR1 IR0 IR4 IR3 IR2 IR7 IR6 IR5
So the order of of the bits in the Bus, Mode and Operation partsare correct, but my slide has Bus first, then Mode, then Operation where it should be Operation, Mode, Bus (if you have the most significant bit on the left).

(It's not IR0 IR1 IR2 IR3 IR4 IR5 IR6 IR7 as you show in your image.)

Thank you! :D
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